C. Opoku, A. S. Dahiya, G. Poulin-Vittrant, N. Camara, D. Alquier, “Source-Gating Effect in Hydrothermally Grown ZnO Nanowire Transistors”, Physica Status Solidi A 213, No. 9 (2016) 2438–2445. Click here to read.
(a) Scanning electron microscope image of a representative single ZnO NW device. (b) Schematic showing device cross-section. (c) Schematic showing the cross-sectional view of the depletion profile at source pinch-off.
Nanowire source-gated field-effect transistors (NW SGT) are demonstrated using hydrothermally grown ZnO NWs. Device quality ZnO NWs with moderate n-type doping are achieved by thermal annealing in ambient air at ∼550 °C. A single ZnO NW device with Au source-drain contacts (s/d) is found to operate under source-gating mode, with characteristics markedly different from a reference device with ohmic contacts. The NW SGT shows exceptionally early drain current–voltage saturation (IDSAT–VDSAT) below 1 V. The change in saturation with the gate voltage (VG) is over 80 times lower than a reference device with ohmic contacts. This device behavior is attributed to the source-gate overlap, enabling gate field penetration inside the depleted source. Current modulation is obtained by a combination of gate-induced image force barrier lowering and the high internal electric fields at source pinch-off. Effective Schottky barrier heights are extracted from activation energy measurements, revealing systematic barrier lowering with increasing VG. These features of the device lead us to conclude that the single NW field-effect transistor (FET) with Schottky contacts operated under SGT mode.